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| TK15323 Audio Analog Switch FEATURES s s s s s Wide Operating Voltage Range (3 to 14 V) Low Distortion (typ. 0.003%) Wide Dynamic Range (typ. 6 VP-P) Low Output Impedance (typ. 20 ) Low Switching Noise (typ. 3 mV) APPLICATIONS s Audio Systems s Radio Cassettes DESCRIPTION The TK15323M is an Analog Switch IC that was developed for audio frequency. Function is to select one output from two inputs in a device that includes two circuits, and the channel can be changed by low level. The TK15323M has a mono-power supply and the input bias is a supply type from outside. Because the distortion is very low, the TK15323M fits various signals switching. It is best suited for Hi-Fi devices. Operating voltage is wide, the circuit plan is simple. The TK15323M is available in a small plastic surface mount package (SSOP-12). TK15323 VCC Bch OUT 1ch-in Ach 1KEY NC GND 11 Bch 10 OUT 9 8 7 Ach 2 KEY NC 2ch-in BLOCK DIAGRAM VCC Ach + - 1 ch ou 1ch-in 1KEY Bch + - ORDERING INFORMATION Ach + - 2 ch ou TK15323M Tape/Reel Code 2ch-in 2KEY Bch + - GND TAPE/REEL CODE TL: Tape Left June 1999 TOKO, Inc. Page 1 TK15323 ABSOLUTE MAXIMUM RATINGS Supply Voltage ......................................................... 15 V Power Dissipation (Note 5) ................................ 350 mW Storage Temperature Range ................... -55 to +150 C Operating Temperature Range ...................-20 to +75 C CONTROL SECTION Input Voltage ................................... -0.3 V to VCC + 0.3 V ANALOG SWITCH SECTION Signal Input Voltage ........................ -0.3 V to VCC + 0.3 V Signal Output Current ............................................. 3 mA Operating Voltage Range ................................. 3 to 14 V Maximum Input Frequency .................................. 100 kHz TK15323M ELECTRICAL CHARACTERISTICS Test conditions: VCC = 8.0 V, TA = 25 C, unless otherwise specified. SYMBOL ICC PARAMETER Supply Current TEST CONDITIONS MIN TYP 3.5 MAX 5.5 UNITS mA KEY CONTROL SECTION VIL VIH IOKEY IIKEY Input Voltage Low Level Input Voltage High Level Output Current Inflow Current To GND From VCC Note 1 -0.3 1.8 +0.8 VCC + 0.3 30 30 V V A A ANALOG SWITCH SECTION THD NL ISO SE P DYN GVA Vcent Vcent IIN ZOUT Total Harmonic Distortion Residual Noise Isolation Separation Maximum Input Signal Level Voltage Gain Input-Output Terminal Voltage Output Terminal Voltage Difference InputBias Current Output Impedance VIN = 1 Vrms, f = 1 kHz Note 2 VIN = 1 Vrms, F = 10 kHz, Note 3 VIN = 1 Vrms, f = 10 kHz, Note 3 f = 1 kHz, THD = 0.1% f = ~20 kHz Vout = Supply voltage from outside Between same channel Note 4 DC Impedance VOUT - 0.2 2.0 0 VOUT 3 0.5 20 VCC 0.003 0.006 10 -75 -80 % Vrms dB dB Vrms dB VOUT + 0.2 7 V mV A Note 1: The KEY input equivalent circuit is shown in Figure A. 1 channel and 2 channel is the separate action by 1Key pin and 2 key pin. When the control pin is Input Key open, it is outputted high level (about 1.4 V). Then the A channel input signal is outputted. The change is carried out at low level. Note 2: The specification means a value as measurement-input terminal connects to ground through a capacitor. Note 3: ISO is a cross talk between A channel and B channel, SEP is a cross talk between 1 channel and 2 Logic channel. The specification means a value as measurement-input termianl connects to ground through 10 k resistor and capacitor. Note 4: Input equivalent circuit is shown in Figure B. The standard application of TK15323M is the direct connecting. When connecting a capacitor, supplying a bias voltage from outside is unnecessary. Note 5: Power dissipation is 350 mW when mounted as recommended. Derate at 3.0 mW/C for operation Figure A above 25C. Input Figure B Page 2 June 1999 TOKO, Inc. TK15323 TEST CIRCUITS AND METHODS 33 F VCC SW6 + SW3 10 F SW7 10 F SW9 SW8 SW4 50 k 50 k SW2 1 kHz 1 Vrms or 2 Vrms 10 kHz 1 Vrms SW5 SW1 L VCC / 2 10 k V ~ V _ THD + H ~ ~ 1: 2: 3: 4: The above condition represents 1ch. The above conditions distortion rate of 1-Ach and dynamic range measurement. SW5 is for residual noise measurement. SW8 is for cross talk (ISO or SEP) measurement. SUPPLY CURRENT (FIGURE 1) VCC A This current is a consumption current with a nonloading condition. 1) Bias supply to Pins 2,4,9,11. (This condition is the same with other measurements, omitted from the next for simplicity) 2) Measure the inflow current to Pin 1 from VCC. This current is the supply current. 50 K + 50 K 50 K 50 K VCC / 2 Figure 1 June 1999 TOKO, Inc. Page 3 TK15323 TEST CIRCUITS AND METHODS (CONT.) CONTROL LOW/HIGH LEVEL (FIGURE 2) This level is to measure the threshold level. 1) Input, the VCC to Pin 1. (This condition is the same with other measurements, omitted from the next for simplicity) 2) Input to Pin 4 with sine wave (f = 1 kHz, VIN = 1 Vrms). 3) Connect an oscilloscope to Pin 3. 4) Elevate the control voltage from 0 V gradually, until the sine wave appears at the oscilloscope. This voltage is the threshold level when the wave appears. VCC + VCC Figure 3 + + ~ Cont. TOTAL HARMONIC DISTORTION (FIGURE 4) Use the lower distortion oscillator for this measurement because distortion of the TK15323 is very low. 1) Pin 5 is in the open condition, or high level. 2) Connect a distortion analyzer to Pin 3. 3) Input the sine wave (1 kHz, 1 Vrms) to Pin 4. 4) Measure the distortion of Pin 3. This value is the distortion of 1-Ach. 5) Next connect Pin 5 to the GND, or low level. 6) Input the same sine wave to Pin 2. 7) Measure in the same way. This value is the distortion of 1-Bch. Figure 2 CONTROL OUTFLOW/INFLOW CURRENT (FIGURE 3) This current means the maximum current with the control. 1) Measure the current from Pin 5 to GND. This current is the outflow current. 2) Next, measure the current from VCC to Pin 5. This current is the inflow current. Page 4 June 1999 TOKO, Inc. TK15323 TEST CIRCUITS AND METHODS (CONT.) VCC VCC + + + + Cont. Cont. Figure 4 Figure 5 VOLTAGE GAIN (FIGURE 5) This is the output level against input level. 1) Pin 5 is in the open condition, or high level. 2) Connect AC volt meters to Pin 4 and Pin 3. (Using the same type meter is best) 3) Input a sine wave (f = max. 20 kHz, 1 Vrms) to Pin 4. 4) Measure the level of Pin 4 and name this V1. 5) Measure the level of Pin 3 and name this V2. 6) Calculate Gain = 20 Log (( |V2 - V1| )/V1) V1 MAXIMUM INPUT LEVEL (FIGURE 6) This measurement measures at output side. 1) Pin 5 is in the open condition, or high level. 2) Connect a distortion analyzer and an AC volt meter to Pin 3. 3) Input a sine wave (1 kHz) to Pin 4 and elevate the voltage gradually until the distortion gets to 0.1%. 4) When the distortion amounts to 0.1%, stop elevating and measure the AC level of Pin 3. This value is the maximum input level of 1-Ach. 5) Next, connect Pin 5 to the GND, or low level. 6) Input the same sine wave to Pin 2. 7) Measure in the same way. This value is the maximum input level of 1-Bch. June 1999 TOKO, Inc. Page 5 TK15323 TEST CIRCUITS AND METHODS (CONT.) VCC VCC + + + + Cont. Cont. Figure 6 Figure 7 RESIDUAL NOISE (FIGURE 7) This value is not S/N ratio. This is a noise which occurs from the device itself. 1) Pin 5 is the open condition, or high level. 2) Connect an AC volt meter to Pin 3. 3) Connect a capacitor from Pin 4 to GND. 4) Measure AC voltage of Pin 3. This value is the noise of 1-Ach. If the influence of noise from outside exists, use optional filters. 5) Next, connect Pin 5 to the GND, or low level. 6) Connect to GND through a capacitor from Pin 2. 7) Measure in the same way. This value is the noise level of 1-Bch. ISOLATION (FIGURE 8) This is the cross talk between Ach and Bch. 1) Pin 5 is in the open condition, or high level. 2) Connect AC volt meters to Pin 2 and Pin 3. 3) Connect a capacitor and a resistance in series to GND from Pin 4. 4) Input a sine wave (10 kHz, 1 Vrms) to Pin 2. 5) Measure the level of Pin 2 and name this V3. 6) Measure the level of Pin 3 and name this V4. 7) Calculate: ISO = 20 Log (V4 / V3) This value is the isolation to Ach from Bch. 8) Next, connect Pin 5 to the GND, or low level. 9) Change line of Pin 2 and Pin 4. 10) Input the same sine wave to Pin 4. 11) Measure and calculate in the same way. This value is the isolation to Bch from Ach. Page 6 June 1999 TOKO, Inc. TK15323 TEST CIRCUITS AND METHODS (CONT.) VCC I/O TERMINAL VOLTAGE (FIGURE 10) This is the DC voltage of input and output. Because the input and the output are nearly equal, only the output is measured. 1) Pin 5 is in the open condition, or high level. 2) Connect a DC volt meter to Pin 3 and measure. This value is the terminal voltage of 1-Ach. 3) Next, connect Pin 5 to the GND, or low level. 4) Measure in the same way. This value is the terminal voltage of 1-Bch. Cont. VCC + + + 10 K Figure 8 SEPARATION (FIGURE 9) This is the cross talk between 1ch and 2ch. 1) Control level is free for Pin 5 and Pin 8. 2) Connect AC volt meters to Pin 4 (or Pin 2) and Pin 10. 3) Connect Pin 9 and Pin 11 to GND through capacitors and a resistance. 4) Input a sine wave (10 kHz, 1 Vrms) to Pin 2 and Pin 4. 5) Measure the level of Pin 4 and name this V5. 6) Measure the level of Pin 10 and name this V6. 7) Calculate: SEP = 20 Log (V6 / V5) This value is the separation to 2ch from 1ch. VCC + + + Cont. Figure 10 OUTPUT TERMINAL DIFFERENCE This is the DC output voltage difference between Ach and Bch. This is calculated by using values measured at the I/O Terminal Voltage. Vcent = | (1 - Ach value) - (1 - Bch value) | This value is the voltage difference of 1ch. + Cont. Figure 9 June 1999 TOKO, Inc. Page 7 + + 10 K TK15323 TYPICAL PERFORMANCE CHARACTERISTICS VCC = 8 V, TA = 25 C, unless otherwise specified. TOTAL HARMONIC DISTORTION vs. FREQUENCY 0.1 SUPPLY CURRENT VS. SUPPLY VOLTAGE 5 4 THD (%) TOTAL HARMONIC DISTORTION vs. LOAD RESISTANCE 0.1 ICC (mA) 3 2 1 0 0 2 4 6 8 10 12 14 16 VCC (V) DYNAMIC RANGE vs. SUPPLY VOLTAGE 5 0.01 THD (%) 0.01 0.001 0.1 1 f (kHz) 10 100 0.001 0.1 1 RL (k) 10 100 DYNAMIC RANGE vs. LOAD RESISTANCE -60 ISOLATION vs. FREQUENCY 4 2 -70 LEVEL (Vrms) LEVEL (Vrms) LEVEL (dB) 1 RL (k) 10 100 3 2 1 0 0 2 4 6 8 10 12 14 16 VCC (V) -80 -90 -100 1 0 0.1 -110 0.1 1 f (kHz) 10 100 SEPARATION vs. FREQUENCY -60 -70 LEVEL (dB) LEVEL (V) CONTROL THRESHOLD VS. TEMPERATURE +.1 VOLTAGE GAIN VS. TEMPERATURE 1.5 -80 -90 -100 -110 0.1 GVA (dB) 1 0 0.5 -.1 0 1 f (kHz) 10 100 -20 0 20 40 60 80 -20 0 20 40 60 80 TA (C) TA (C) Page 8 June 1999 TOKO, Inc. TK15323 TYPICAL PERFORMANCE CHARACTERISTICS (CONT.) VCC = 8 V, TA = 25 C, unless otherwise specified. OUTPUT DIFFERENCE VS. TEMPERATURE 1.2 6 LEVEL (Vrms) LEVEL (mV) 3 CURRENT (A) 1.0 .8 .6 .4 .2 0 -20 0 20 40 60 80 TA (C) 0 -20 0 20 40 60 80 TA (C) 0 -20 0 20 40 60 80 TA (C) RESIDUAL NOISE VS. TEMPERATURE INPUT BIAS CURRENT VS. TEMPERATURE 4 2 2 1 TERMINAL VOLTAGE AND CIRCUIT Condition: VCC = 8 V. PIN NO. 1 2 4 9 11 ASSIGNMENT VCC IN A, IN B Input: Open Input: 4.0 V DC VOLTAGE 8V CIRCUIT/FUNCTION Supply Voltage Pin 0V 4V Signal Input Pin 3 10 OUT 100 Input: Open Input: 4.0 V 0.7 V 4V Signal Output Pin 5 8 KEY 1.4 V Control Pin 12 6 7 June 1999 TOKO, Inc. GND NC 0V Floating Ground Pin No Contact Pin Page 9 TK15323 APPLICATION INFORMATION KEY INPUT CIRCUIT 1ch and 2ch is separate action by each control keys. Figure 11 is an equivalence circuit of key input. When terminal of key is the open, is outputting high level (about 1.4 V), and then Ach input signal is outputted. The channel at TK15323M can be changed by low level. When a control terminal was operated to low function, sometimes it may flow out maximum values about 30 A as current from the terminal. For this reason, please use a resistance which does not exceed 0.8 V when attaching a resistance to the outside and making a low condition. Key in 1Ain VCC 2Ain 33 F + 10 F + 11 10 9 8 10 F + RL RL 7 1Key 1Bin 2Key 2 Bin Figure 13 i to Logic CROSS TALK (ISOLATION AND SEPARATION) Figure 14 is an example of a layout pattern. As the TK15323M is a direct coupling type, the influence by applications is not almost. But, if it is coupled at the capacitor, by high impedance at input, capacitors acccomplishes the antenna action each other. Then in case its parts are bigger, and the space between capacitors is too narrow, cross talk will increase. Therefore, when designing the print circuit pattern, separate the input capacitors as far as possible and use smaller parts. Figure 11 SWITCHING TIME This time is the signal change response time compared to the control key input signal. Figure 12 illustrates the timimg chart. T = 2 s typically. Bch (Ach) Key in SW out 50% 2AIN t VCC GND 2BIN Ach (Bch) Figure 12 APPLICATION Figure 13 illustrates an example of a typical application. The standard application is to use capacitor coupling at the inputs and output of the TK15323M. For characteristics of distortion and dynamic range versus RL, refer to the graphs in the Typical Performance Characteristics. The TK15323M can be used at the capacitor coupling too, but then the bias supply is necessary from outside. If capacitor coupling is desired, then it is recommended to use a built-in bias type. Input of the TK15323M is the open base type. DC input bias voltage of the TK15323M is VCC/2 V. Page 10 1OUT 2OUT 1AIN 1KEY 2KEY 1BIN Figure 14 June 1999 TOKO, Inc. TK15323 APPLICATION INFORMATION (CONT.) OUTPUT TERMINAL VOLTAGE DIFFERENCE This parameter is the output voltage difference between Ach and Bch, and appears when the channel changes from Ach to Bch, or changes to the reverse. Generally, this is called Switching Noise or Pop Noise. If this value is big and if this noise is amplified by the final amplifier and is outputted by the speakers, then it appears as a Shock Sound. Output terminal voltage difference of the TK15323M is a value that adds the internal bias difference and the off-set voltage difference. The value of the TK15323M is very small; its maximum value is 3 mV. So almost the output bias difference will be decided by the supply bias difference. Toko can offer the "Muting IC" if users wish to mute Switching Noise. DIRECT TOUCH The signal input terminals: Internal circuits are operated by constant current circuit, even if VCC or GND is contacted, damage does not occur. The signal output terminal: Outflow or inflow current is decided by ability of final transistor, but protection circuit is not attached. If GND or VCC are contacted damage may occur. Pay attention to long time contact. Do not supply over the maximum rating. Referenced to GND, do not provide to all terminals over VCC +0.3 V or -0.3 V. DC SIGNAL INPUT The output of the TK15323M has a saturation voltage (both VCC and GND sides about 1.0 V); accordingly the use of a DC signal is not recommend (e.g., the pulse signal etc.) NC TERMINAL NC terminals are not wired inside IC by bonding wire. NC terminals are not tested so do not connect at outside. June 1999 TOKO, Inc. Page 11 TK15323 PACKAGE OUTLINE Marking Information 0.4 SSOP-12 TK15323M 323 Marking 12 7 e1 5.4 AAA 4.4 1.2 YYY e 0.8 Recommended Mount Pad 1 Lot. No. 6 1.7 max 1.4 0.5 0 ~ 10 5.0 0 ~ 0.2 +0.15 0.3 -0.05 e 0.8 0.1 6.0 0.10 M + 0.3 Dimensions are shown in millimeters Tolerance: x.x = 0.2 mm (unless otherwise specified) Toko America, Inc. Headquarters 1250 Feehanville Drive, Mount Prospect, Illinois 60056 Tel: (847) 297-0070 Fax: (847) 699-7864 TOKO AMERICA REGIONAL OFFICES Midwest Regional Office Toko America, Inc. 1250 Feehanville Drive Mount Prospect, IL 60056 Tel: (847) 297-0070 Fax: (847) 699-7864 Western Regional Office Toko America, Inc. 2480 North First Street , Suite 260 San Jose, CA 95131 Tel: (408) 432-8281 Fax: (408) 943-9790 Eastern Regional Office Toko America, Inc. 107 Mill Plain Road Danbury, CT 06811 Tel: (203) 748-6871 Fax: (203) 797-1223 Semiconductor Technical Support Toko Design Center 4755 Forge Road Colorado Springs, CO 80907 Tel: (719) 528-2200 Fax: (719) 528-2375 Visit our Internet site at http://www.tokoam.com The information furnished by TOKO, Inc. is believed to be accurate and reliable. However, TOKO reserves the right to make changes or improvements in the design, specification or manufacture of its products without further notice. TOKO does not assume any liability arising from the application or use of any product or circuit described herein, nor for any infringements of patents or other rights of third parties which may result from the use of its products. No license is granted by implication or otherwise under any patent or patent rights of TOKO, Inc. Page 12 (c) 1999 Toko, Inc. All Rights Reserved IC-119-TK119xx 0798O0.0K 0.15 +0.15 -0.15 June 1999 TOKO, Inc. Printed in the USA |
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